Renesas M16C Series User Manual

Clock-Synchronous Serial I/O
M30240 Group
Rev.1.00 Sep 24, 2003 Page 187 of 360
Figure 2.45: Operation timing of transmission in clock synchronous serial I/O mode
CTSi
CLKi
T
XDi
CLK
RXD
Port
Microcomputer
Receiver side IC
Example of Wiring
Example of Operation
D0
D1
D2 D3
D4 D5 D6
D7
D0
D1
D2 D3
D4 D5 D6
D7
TCLK
Stopped pulsing because
transfer enable bit = “0”
Tc = T
CLK = 2(n + 1) / fi
fi: frequency of BRGi count source (f
1, f8, f32)
n: value set to BRGi
Transfer clock
Transmit
enable bit (TE)
Transmit
buffer empty
flag (Tl)
CLKi
TxDi
Transmit register
empty flag
(TXEPT)
“H”
“L”
“0”
“1”
“0”
“1”
“0”
“1”
CTSi
Transmit
interrupt request
bit (IR)
“0”
“1”
Cleared to “0” when interrupt request is accepted, or cleared by software
D0
D1
D2 D3
D4 D5 D6
D7
(1) Transmission enabled
(2) Confirming CTS
(3) Start transmission
Tc
(4) Transmission is complete
(5) Transmit next data
Data is set to UARTi transmit buffer register
Stopped pulsing because CTSi = “H”
Shown in ( ) are bit symbols.
The above timing applies to the following settings:
• Internal clock is selected.
• CTS function is selected.
• CLK polarity select bit = “0”.
• Transmit interrupt cause select bit = “0”.
Transferred from UARTi transmit buffer register to UARTi transmit register

Renesas M16C Series Specifications

General

Brand	Renesas
Model	M16C Series
Category	Computer Hardware
Language	English