RL78/F13, F14 CHAPTER 16 SERIAL INTERFACE IICA
R01UH0368EJ0210 Rev.2.10 1016
Dec 10, 2015
CHAPTER 16 SERIAL INTERFACE IICA
The number of channels of the serial Interface IICA differs, depending on the product.
Groups A, C-1, and D-1 Groups B, C-2, D-2, and E
Channel –
1
Remark Group A: RL78/F13 (LIN incorporated) products with 20, 30, 32, 48, or 64 pins and 16 Kbytes to 64 Kbytes
of code flash memory
Group B: RL78/F13 (LIN incorporated) products with 48 or 64 pins and 96 Kbytes to 128 Kbytes of code
flash memory or with 80 pins and 64 Kbytes to 128 Kbytes of code flash memory
Group C-1: RL78/F13 (CAN incorporated) products with 30 pins and 32 Kbytes to 128 Kbytes of code flash
memory
Group C-2: RL78/F13 (CAN incorporated) products with 32, 48, 64, or 80 pins and 32 Kbytes to 128 Kbytes
of code flash memory
Group D-1: 30-pin products of the RL78/F14
Group D-2: RL78/F14 products with 32, 48, 64, or 80 pins and 48 Kbytes to 96 Kbytes of code flash memory
Group E: RL78/F14 products with 48, 64, or 80 pins and 128 Kbytes to 256 Kbytes of code flash memory
or with 100 pins and 64 Kbytes to 256 Kbytes of code flash memory
Cautions 1. Most of the following descriptions in this chapter use the Group E products as an example.
2. Products of Groups A and C-1 do not have this function.
16.1 Functions of Serial Interface IICA
Serial interface IICA has the following three modes.
(1) Operation stop mode
This mode is used when serial transfers are not performed. It can therefore be used to reduce power consumption.
(2) I
2
C bus mode (multimaster supported)
This mode is used for 8-bit data transfers with several devices via two lines: a serial clock (SCLA0) line and a serial
data bus (SDAA0) line.
This mode complies with the I
2
C bus format and the master device can generated “start condition”, “address”,
“transfer direction specification”, “data”, and “stop condition” data to the slave device, via the serial data bus. The
slave device automatically detects these received status and data by hardware. This function can simplify the part
of application program that controls the I
2
C bus.
Since the SCLA0 and SDAA0 pins are used for open drain outputs, serial interface IICA requires pull-up resistors for
the serial clock line and the serial data bus line.
(3) Wakeup mode
The STOP mode can be released by generating an interrupt request signal (INTIICA0) when an extension code from
the master device or a local address has been received while in STOP mode. This can be set by using the WUP0
bit of IICA control register 01 (IICCTL01).
Figure 16-1 shows a block diagram of serial interface IICA.
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