RL78/F13, F14 CHAPTER 23 STANDBY FUNCTION
R01UH0368EJ0210 Rev.2.10 1518
Dec 10, 2015
CHAPTER 23 STANDBY FUNCTION
23.1 Standby Function and Configuration
23.1.1 Standby function
The standby function reduces the operating current of the system, and the following three modes are available.
(1) HALT mode
HALT instruction execution sets the HALT mode. In the HALT mode, the CPU operation clock is stopped. If the high-
speed system clock, high-speed on-chip oscillator, subsystem clock, or low-speed on-chip oscillator is operating
before the HALT mode is set, oscillation of each clock continues. In this mode, the operating current is not decreased
as much as in the STOP mode, but the HALT mode is effective for restarting operation immediately upon interrupt
request generation and carrying out intermittent operations frequently.
(2) STOP mode
STOP instruction execution sets the STOP mode. In the STOP mode, the high-speed system clock and high-speed
on-chip oscillator stop, stopping the whole system, thereby considerably reducing the CPU operating current.
Because this mode can be cleared by an interrupt request, it enables intermittent operations to be carried out. However,
because a wait time is required to secure the oscillation stabilization time after the STOP mode is released when the
X1 clock is selected, select the HALT mode if it is necessary to start processing immediately upon interrupt request
generation.
The output from a port pin can be inverted in response to the generation of a source condition for release from the
STOP mode.
(3) SNOOZE mode
In response to a request for A/D conversion by a timer trigger signal (INTRTC), ELE event input
Note 1
, or signal generated
by the A/D converter trigger select register 0 (ADTRGS0)
Note 2
, a signal for data reception by the LIN/UART module
(RLIN3) in the UART mode, or a DTC activation signal, this LSI is released from the STOP mode and A/D conversion,
data reception, or DTC operation proceed without the CPU operating. This can only be specified when the high-speed
on-chip oscillator is selected for the CPU/peripheral hardware clock (f
CLK).
There is a function for the output of a signal to indicate whether the LSI is in the SNOOZE mode or not on a specified
pin when this LSI enters and is released from the SNOOZE mode.
In any mode, all the contents of registers, flags and data memory just before the standby mode is set are held. The I/O
port output latches and output buffer statuses are also held.
Notes 1. Only in the RL78/F14.
2. Only in the RL78/F13.
(Cautions are listed on the next page.)
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