RL78/F13, F14 CHAPTER 7 TIMER RJ
R01UH0368EJ0210 Rev.2.10 561
Dec 10, 2015
7.4.5 Pulse Width Measurement Mode
In this mode, the pulse width of an external signal input to the TRJIO0 pin is measured.
When the level specified by the TEDGSEL bit in the TRJIOC0 register is input to the TRJIO0 pin, the decrement is started
with the selected count source. When the specified level on the TRJIO0 pin ends, the counter is stopped, the TEDGF bit in
the TRJCR0 register is set to 1 (active edge received), and an interrupt request is generated. The measurement of pulse
width data is performed by reading the count value while the counter is stopped. Also, when the counter underflows during
measurement, the TUNDF bit in the TRJCR0 register is set to 1 (underflow) and an interrupt request is generated.
Figure 7-16 shows the Operation Example in Pulse Width Measurement Mode.
When accessing bits TEDGF and TUNDF in the TRJCR0 register, see 7. 5. 2 Access to Flags (Bits TEDGF and TUNDF
in TRJCR0 Register).
Caution The 20-pin products do not have TRJIO0 pin. Thus, the pulse width measurement mode cannot be
used.
Figure 7-16. Operation Example in Pulse Width Measurement Mode
FFFFH
Counter content (hex)
TUNDF bit in
TRJCR0 register
Measurement
is stopped
This example applies when the high-level width of the measurement pulse is measured (TEDGSEL bit in TRJIOC0 register = 1)
n
0000H
n = TRJ0 register content
Measurement is started
Measurement
is started
TSTART bit in
TRJCR0 register
Measurement pulse
input to TRJIO0 pin
TEDGF bit in
TRJCR0 register
IF bit in
INTC register
Measurement
is stopped
Time
Set to 1 by a program
Set to 0 by a program
Set to 0 by a programSet to 0 by a program
Acknowledgement of an
interrupt request
Underflow
Measurement
is started
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