RL78/F13, F14 CHAPTER 27 SAFETY FUNCTIONS
R01UH0368EJ0210 Rev.2.10 1586
Dec 10, 2015
27.3.2 CRC operation function (general-purpose CRC)
In order to guarantee safety during operation, the IEC61508 standard mandates the checking of data even while the
CPU is operating.
In the RL78/F13 and RL78/F14, a general CRC operation can be executed as a peripheral function while the CPU is
operating. The general CRC can be used for checking various data in addition to the code flash memory area. The data
to be checked can be specified by using software (a user-created program). In HALT mode, CRC operations can only
proceed during DTC transfer.
The general CRC operation can be executed in the main system clock operation mode as well as the subsystem clock
operation mode.
The CRC generator polynomial used is “X
16
+ X
12
+ X
5
+ 1” of CRC-16-CCITT. The data to be input is inverted in bit
order and then calculated to allow for LSB-first communication. For example, if the data 12345678H is sent from the LSB,
values are written to the CRCIN register in the order of 78H, 56H, 34H, and 12H, enabling a value of 08F6H to be
obtained from the CRCD register. This is the result obtained by executing a CRC operation on the bit rows shown below,
which consist of the data 12345678H inverted in bit order.
CRCIN setting data 78H 56H 34H 12H
Bit representation data 0111 1000 0101 0110 0011 0100 0001 0010
Bit reverse data 0001 1110 0110 1010 0010 1100 0100 1000
Result data 0110 1111 0001 0000
CRCD data 0000 1000 1111 0110 Obtained result
(08F6H)
Caution Setting a software break in a target area of CRC operation alters the result of the CRC operation
because the debugger changes the row where the software break is to be set into a break instruction
during program execution.
Bit reverse
Bit reverse
Operation with polynomial
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