Renesas RL78/F13 User Manual

RL78/F13, F14 CHAPTER 21 INTERRUPT FUNCTIONS
R01UH0368EJ0210 Rev.2.10 1473
Dec 10, 2015
CHAPTER 21 INTERRUPT FUNCTIONS
If different processing is required during the execution of one program, interrupts provide a convenient and fast way of
switching to another program to handle that processing.
After processing at the branch destination is completed, execution returns to the point where the original program was
suspended.
The number of interrupt sources differs, depending on the product.
RL78/F13 (LIN) RL78/F13 (CAN and LIN) RL78/F14
Group A Group B Group C Group D Group E
20 pins 30/32 pins 48/64 pins 48 pins 64/80 pins 30 pins 32 pins 48 pins 64/80 pins 30 pins 32 pins 48 pins 64/80 pins 48 pins 64 pins 80/100 pins
Maskable
interrupts
External 7 8 10 12 13 9 9 13 14 9 9 13 14 14 15 16
Internal 26 26 26 35 35 39 40 40 40 40 41 41 41 48 48 48
Remark Group A: RL78/F13 (LIN incorporated) products with 20, 30, 32, 48, or 64 pins and 16 Kbytes to 64 Kbytes of
code flash memory
Group B: RL78/F13 (LIN incorporated) products with 48 or 64 pins and 96 Kbytes to 128 Kbytes of code
flash memory or with 80 pins and 64 Kbytes to 128 Kbytes of code flash memory
Group C: RL78/F13 (CAN incorporated) products with 30, 32, 48, 64, or 80 pins and 32 Kbytes to 128
Kbytes of code flash memory
Group D: RL78/F14 products with 30, 32, 48, 64, or 80 pins and 48 Kbytes to 96 Kbytes of code flash
memory
Group E: RL78/F14 products with 48, 64, or 80 pins and 128 Kbytes to 256 Kbytes of code flash memory or
with 100 pins and 64 Kbytes to 256 Kbytes of code flash memory
21.1 Interrupt Function Types
The following two types of interrupt functions are used.
(1) Maskable interrupts
These interrupts undergo mask control. Maskable interrupts can be divided into four priority groups by setting the
priority specification flag registers (PR00L, PR00H, PR01L, PR01H, PR02L, PR02H, PR03L, PR10L, PR10H, PR11L,
PR11H, PR12L, PR12H, PR13L).
Multiple interrupt servicing can be applied to low-priority interrupts when high-priority interrupts are generated. If two or
more interrupt requests, each having the same priority, are simultaneously generated, then they are processed
according to the default priority of vectored interrupt servicing. For the default priority, see Table 21-1.
A standby release signal is generated and STOP, HALT, and SNOOZE modes are released.
External interrupt requests and internal interrupt requests are provided as maskable interrupts.
(2) Software interrupt
This is a vectored interrupt generated by executing the BRK instruction. It is acknowledged even when interrupts are
disabled. The software interrupt does not undergo interrupt priority control.

Renesas RL78/F13 Specifications

General

Brand	Renesas
Model	RL78/F13
Category	Computer Hardware
Language	English