Renesas RL78/F13 User Manual

RL78/F13, F14 CHAPTER 26 VOLTAGE DETECTOR
R01UH0368EJ0210 Rev.2.10 1569
Dec 10, 2015
26.4.2 When used as interrupt mode
 When starting operation
Specify the operation mode (the interrupt mode (LVIMDS1, LVIMDS0 = 0, 1)) and the detection voltage (V
LVD)
by using the option byte 000C1H/020C1H.
Do not input a high level to the RESET pin when the supply voltage is not within the operating voltage range.
Start in the following initial setting state.
 Set bit 7 (LVISEN) of the voltage detection register (LVIM) to 0 (disable rewriting of voltage detection level
register (LVIS))
 When the option byte LVIMDS1 is clear to 0 and LVIMDS0 is set to 1, the initial value of the LVIS register is set
to 01H.
Bit 7 (LVIMD) is 0 (interrupt mode).
Bit 0 (LVILV) is 1 (low-voltage detection level: V
LVDL).
Figure 26-5 shows the timing of the internal interrupt signal generated by the voltage detector.

Renesas RL78/F13 Specifications

General

Brand	Renesas
Model	RL78/F13
Category	Computer Hardware
Language	English