RL78/F13, F14 CHAPTER 7 TIMER RJ
R01UH0368EJ0210 Rev.2.10 543
Dec 10, 2015
CHAPTER 7 TIMER RJ
Timer RJ is a 16-bit timer that can be used for pulse output, external pulse width or period measurement, and counting
external events.
7.1 Overview
This 16-bit timer consists of a reload register and a down counter. The reload register and the down counter are allocated
to the same address, and they can be accessed by accessing the TRJ0 register.
Table 7-1 lists the Timer RJ Specifications. Figure 7-1 shows the Timer RJ Block Diagram.
Table 7-1. Timer RJ Specifications
Item Description
Operating
modes
Timer mode The count source is counted.
Pulse output mode
Note
The count source is counted and the output is inverted at each underflow of the
timer.
Event counter mode
Note
An external event is counted.
Operation is possible in STOP mode.
Pulse width measurement
mode
Note
An external pulse width is measured.
Pulse period measurement
mode
Note
An external pulse period is measured.
Count source (Operating clock) fCLK, fCLK/2, fCLK/8, fIL, fSL, or event input from the event link controller (ELC)
selectable
Interrupt • When the counter underflows.
• When the measurement of the active width of the external input (TRJIO0) is
completed in pulse width measurement mode.
• When the set edge of the external input (TRJIO0) is input in pulse period
measurement mode.
Selectable functions • Coordination with the event link controller (ELC).
Event input from the ELC is selectable as a count source.
Note The 20-pin products do not have TRJIO0 and TRJO0 pins. Thus, the pulse output mode, event counter mode,
pulse width measurement mode, and pulse period measurement mode cannot be used.
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