RL78/F13, F14 CHAPTER 5 CLOCK GENERATOR
R01UH0368EJ0210 Rev.2.10 365
Dec 10, 2015
5.2 Configuration of Clock Generator
The clock generator includes the following hardware.
Table 5-1. Configuration of Clock Generator
Item Configuration
Control registers Clock operation mode control register (CMC)
System clock control register (CKC)
Clock operation status control register (CSC)
Oscillation stabilization time counter status register (OSTC)
Oscillation stabilization time select register (OSTS)
Peripheral enable registers 0, 1, 2 (PER0, PER1, PER2)
Operation speed mode control register (OSMC)
High-speed on-chip oscillator frequency select register (HOCODIV)
High-speed on-chip oscillator trimming register (HIOTRM)
CAN clock select register (CANCKSEL)
LIN clock select register (LINCKSEL)
Clock select register (CKSEL)
PLL control register (PLLCTL)
PLL status register (PLLSTS)
f
MP clock division register (MDIV)
Oscillators X1 oscillator
XT1 oscillator
High-speed on-chip oscillator clock
Low-speed on-chip oscillator clock