RL78/F13, F14 CHAPTER 8 TIMER RD
R01UH0368EJ0210 Rev.2.10 630
Dec 10, 2015
(1) Operation Example
By setting bits CCLR0 to CCLR2 in the TRDCRi register (i = 0 or 1), the timer RDi counter value is reset by an input
capture/compare match. If the expected compare value is FFFFH at this time, FFFFH changes to 0000H, same as
the overflow operation, and the overflow flag is set to 1.
Figure 8-49. Operation Example of Output Compare Function
Output level
held
m
n
p
Count source
m + 1 m + 1
n + 1
Output inverted by compare match
p + 1
Output level
held
Output level
held
Value in TRDi register
TSTARTi bit in
TRDSTR register
TRDIOAi output
IMFA bit in
TRDSRi register
TRDIOBi output
IMFB bit in
TRDSRi register
TRDIOCi output
IMFC bit in
TRDSRi register
Remark
i = 0 or 1
M: Value set in TRDGRAi register
n: Value set in TRDGRBi register
p: Value set in TRDGRCi register
The above diagram applies under the following conditions :
The CSELi bit in the TRDSTR register is set to 1 (TRDi is not stopped by compare match).
Bits TRDBFCi and TRDBFDi in the TRDMR register are set to 0 (TRDGRCi and TRDGRDi do not operate as buffers).
Bits EAi, EBi, and ECi in the TRDOER1 register are set to 0 (TRDIOAi, TRDIOBi and TRDIOCi output enabled).
Bits CCLR2 to CCLR0 in the TRDCRi register are set to 001B (TRDi is set to 0000H by compare match with TRDGRAi).
Bits TOAi and TOBi in the TRDOCR register is set to 0 (initial output is low until compare match), the TOCi bit is set to 1 (initial output is high until
compare match).
Bits IOA2 to IOA0 in the TRDIORAi register are set to 011B (TRDIOAi output inverted at TRDGRAi compare match).
Bits IOB2 to IOB0 in the TRDIORAi register are set to 010B (TRDIOBi high output at TRDGRBi compare match).
Bits IOC3 to IOC0 in the TRDIORCi register are set to 1001B (TRDIOCi low output at TRDGRCi register compare match).
Bits IOD3 to IOD0 in the TRDIORCi register are set to 1000B (TRDGRDi register does not control TRDIOBi pin output. Pin output by compare
match is disabled).
Initial output is high
Count
restarts
Time
Count
stops
Initial output is low
Set to 0 by a program
High output by compare match
Initial output is low
Set to 0 by a program
Low output by compare match
Set to 0 by a program
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