SWT 3000 Equipment Manual PU3 Module
© SIEMENS AG 2008 Edition p3_3_x 08/09 Page - 15
Line interface G703.1 (64 kbit/s)
Coding in accordance with G703.1 permits simultaneous transmission of the data of a 64kHz and
an 8kHz clock pulse and is carried out according to the following scheme:
1. Division of a 64kbit period into four identical intervals.
2. A binary "1" is coded as a block of four 1100.
3. A binary "0" is coded as a block of four 1010.
4. The binary signal is converted into an AMI-coded signal, with alternating polarity of
consecutive blocks of four. AMI is the abbreviation for Alternate Mark Inversion. The
code is generated from the NRZ code by representing the code elements of the logic
"1" state alternately through pulses with positive or negative voltage.
5. The change of polarity of every eighth block is suppressed for marking the octet
(8kHz clock).
The nominal data rate is 64 kbit/s. The bit rate on the line is 256 kbit/s due to the conversion of
the bits into a block of four.
Characteristics
:
Number of signal lines: 4 (one balanced pair for transmit and receive direction)
Level, transmitter end: "Space" 0V+/- 0,1V, "Mark" 1V
Level, receiver end: 0...3dB
Impedance: 120 Ohm
Bit rate: 64 kbit/s (gross bit rate=4*64kBi/s=256kBit/s)
Coding: AMI
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