Xerox 550 User Manual

CAL4 CALL 4
(Word
index al ignment)
CALL 4 causes
the basic processor to trap to location X'4B'.
CONTROL INSTRUCTIONS
The following privileged instructions are used to control the
basic operating conditions of the basic processor:
Instruction
Name
Mnemonic
Load Program Status Words
LPSD
Exchange Program Status Words
XPSD
Load Register Pointer
LRP
Move to Memory Contro I
MMC
Load
Real Address
LRA
Load Memory Status
LMS
Wait
WAIT
Read
Direct
RD
Write Direct
WD
If execution of any control instruction is attempted while
the basic processor is in the slave mode (i. e., while bit 8
of the current program status words is a 1), the basic pro-
cessor unconditionally traps to iocation X
i
4-0' prior to
executing the instruction.
PROGRAM STATUS WORDS
Program status words have the following structure when
stored in memory:
Bit
Position
Designation Function
0-3
CC
Condition code
4
FR
Floating round
5
FS
Floating significance mask
6
FZ
Floating zero mask
7
FN
Floating normal ize mask
Bit
Position
Designation
Function
8
MS
Master/slave mode control
9
MM
Memory map mode control
11
AM
Fixed-point arithmetic
overflow trap mask
15-31
IA
Instruction
address
32-35
WK
Write key
37
CI
Counter interrupt group
inhibit
38
II
I/O interrupt group inhibit
39
EI
External interrupt inhibit
58-59
RP
Regi ster pointer
60
RA
Register altered
61
MA
Mode altered
The detailed functions of the various portions of the pro-
gram status words are described in Chapter 2, .. Program
Status Words".
LPSD LOAD PROGRAM STATUS WORDS
(Doubleword index alignment, privileged)
LOAD PROGRAM STATUS WORDS replaces bits o through 39,
60 and 61 of the current program status words with bits 0
through 39, 60 and 61 of the effective doubleword.
Control bits used in the LPSD instruction are:
Bit
Position
Designation
Control Function
8
LP
Load pointer control
10
CL
Clearing of interrupt level
11
AD
Armed/disarmed state
The following conditional operations are performed:
1.
If bit position 8 (LP) of LPSD contains a 1, bits 56
through 59 (register pointer) of the current program
status words are replaced by bits 56 through 59 of the
effective doubleword; if bit 8 of LPSD is a 0, the cur-
rent register pointer value remains unchanged.
2. If. bit position 10 (CL) of LPSD contains a 1, the highest
priority interrupt level currently in the active state is
cleared (i. e., reset to either the armed state or the dis-
armed state); the interrupt level is armed if bit 11 (AD)
Control Instructi ons 93

Xerox 550 Specifications

General

Brand	Xerox
Model	550
Category	Printer
Language	English