Table 11. Read Direct Iv\ode 9 Status Word (cont.)
RD
Status Word
Bit No.
Basic Processor Cluster
Memory
Uni
t 1
08
Not
Assigned
Port Enable 4
09
ALTSEL
Port Enable 5
10
FSELA
Port Enable 6
11
FSELBO
Not
Assigned
12
FSELBI
Not Assigned
13
Real Time Clock
1-S0
Interleave
Enable
14
Real Time Clock 1-S1 Starting Address S12
15
Real Time Clock
2-S0
Starting Address S13
16
Real
Time Clock 2-S1 Starti ng Address S 14
17
Real
Time Clock
3-S0
Starting Address S15
18
Real Time Clock
3-S1
Starting Address S16
19
Subj
ective
Time Clock
-so
Starting Address S17
20
Subjective
Time Clock
-S
1
Starting Address
S18
21
External Interrupt Group 2
Option
Absent
Not Assigned
22
External Interrupt Group 3 Option Absent
Not Assigned
23
External Interrupt Group 4
Option
Absent
Not
Assigned
24
External Interrupt Group 5
Option
Absent
Not Assigned
25
Not
Assigned
Not
Assigned
26
Not
Assigned
Not Assigned
27
tChassis
Type-2
4
tChassis
Type-2
4
28
Chassis
Type-2
3
Chassis
Type-2
3
29
Chassis
Type-2
2
Chassis Type-22
30
Chassis
Type-2
1
Chassis
Type-2
1
31
Chassis
Type-2
0
Chassis Type-2
0
t
See Chassi s Type T abl e .
I
Table 12. Chassis Type Assignments
Chassis Type
24
2
3
22
21
2
0
Configuration Information
Processor Clusters
1
1
0
0 0
Reserved
1
1
0 0
1
Basi
c Processor Cluster
1
1 0
1
0
Reserved
1 1
0
1
1 Reserved
1
I
1 1
I
0 0
I/O
Expansion Cluster
1
1 1
0
1 Reserved
1
1 1
1
0
Reserved
1 1
1 1
1 Reserved
106 Control Instructions