Xerox 550 User Manual

FMS
FLOATING MULTIPLY SHORT
(Word index alignment)
The
effective word (multiplier) and the contents of register R
(multiplicand) are loaded into a set of internal registers,
and both numbers
are then prenormalized (if necessary). A
normalized
6-digit product is produced, appended by a
guard
digit. If FR equals 1, and the guard digit contains 8
or greater, the fraction is incremented. If no floating-
point arithmetic fault occurs, the product is loaded into
register R as a short-format floating-point number.
Affected: (R), CC
(R) x EW-R
Trap: Floating-point arith-
metic fault
FML FLOATING MULTIPLY LONG
(Doubleword index alignment)
The
effective doubleword (multiplier) and the contents of
registers Rand Ru1 (multiplicand) are loaded into a set of
internal registers. {FLOATING MULTIPLY LONG then
operates identically to FLOATING MULTIPLY SHORT
(FMS),
except that the operands are each 14 hexadecimal
digits long. R must be an even value for correct results.
If no floating-point a,rithmetic fault occurs, the product is
loaded into registers Rand Ru 1 as a long-format floating-
... ,..: ... + .......... hor
t"~ ...... _ ••• __ ••
Affected: (R), (Ru 1), CC
(R, Ru1) x ED -R, Ru1
Trap: Floating-point arith-
metic fault, instruc-
tion exception
The R field of the FML instruction must be an even value
for proper operation of the instruction; if the R field of
FML is an odd value, the instruction traps to location X
'
4D',
instruction exception trap.
FDS FLOATING DIVIDE SHORT
(Word index alignment)
The effective word (divisor) and the contents of register R
(dividend)
are loaded into a set of internal registers and
both numbers
are then prenormalized (if necessary). A
normalized
6-digit quotient is produced, appended by a
guard
digit. If FR equals 1, and the guard digit contains 8
or greater, the fraction is incremented. If no floating-
point arithmetic fault occurs, the quotient is loaded into
register R as a short-format floating-point number.
Affected: (R), CC
(R) + EW-R
Trap: Floating-point arith-
metic fault
FDL
FLOATING DNIDE LONG
(Doubleword index alignment)
The effective doubleword (divisor) and the contents of
registers
Rand Ru 1 (dividend) are loaded into a set of
internal registers. F LOA TING DIVIDE LONG then op-
erates identically to FLOATING DIVIDE SHORT (FDS),
except that the operands are each 14 hexadecimal digits
long. R must be an even value for correct results. If
no
floating-point arithmetic fault occurs, the quotient is
loaded into registers Rand Ru 1 as a long-format floating-
point number.
Affected: (R), (Ru 1), CC
(R, Rul) + ED - R, Rul
Trap:
Floating'~point arith-
metic fault, instruc-
tion exception
The R field of the FDL instruction must be an even value
for proper operation of the instruction; if the R field ofFDL
is an odd value, the instruction traps to location X 14D 1
i'nstruction exception trap.
PUSH-DOWN INSTRUCTIONS (NON-PRIVILEGED)
The term "
pus
h-down processing" refers to the programming
technique (used extensively in recursive routines) of storing
the context of a calculation in memory, proceeding with a
npw c;pt (If i nfnrmnti nn I nnrl thpn ncti vnti n9 thp. prp.vi Oiled),
stored information. Typically, this process involves a re-
served area of memory (stack) into which operands are
pushed (stored) and from which operands are pulled (loaded)
on a
last-in, first-out basis. The basic processor pro-
vides for simplified and efficient programming of push-
down processing by means of the following non-privi leged
instructions:
Instruction
Name
Mnemonic
Push Word
PSW
Pull Word
PLW
Push Multiple PSM
Pull Multiple
PLM
fv\odify Stack Pointer
MSP
STACK POINTER DOUBLEWORD (SPD)
Each non-privileged push-down instruction operates with
respect to a memory stack that is defined by a doubleword
Push-Down Instructions
(Non-Privi leged) 79

Xerox 550 Specifications

General

Brand	Xerox
Model	550
Category	Printer
Language	English