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Xilinx KC705 User Manual

Xilinx KC705
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KC705 Evaluation Board 51
UG810 (v1.8) March 20, 2018 www.xilinx.com
Chapter 1: KC705 Evaluation Board Features
The character display runs at 5.0V and is connected to the FPGA's 1.5V HP bank 33 through
a Texas Instruments TXS0108E 8-bit bidirectional voltage level translator (U10). Figure 1-21
shows the LCD interface circuit.
The KC705 board base board uses a male Samtec MTLW-107-07-G-D-265 2x7 header (J31)
with 0.025-inch square posts on 0.100-inch centers for connecting to a Samtec
SLW-107-01-L-D female socket on the LCD display panel assembly. The LCD header shown
in Figure 1-22.
X-Ref Target - Fig ure 1-21
Figure 1-21: LCD Interface Circuit
UG810_c1_21_031214
LCD Contrast
Potentiometer
LCD_RW
LCD_DB4
LCD_DB6
LCD_RS
LCD_E
NC
NC
LCD_DB5
LCD_DB7
9
87
65
43
2
10
1
12
14
11
13
LCD_VEE
GND
VCCB
B1
B2
B3
B4
B6
B7
GND
A3
A8
OE
A4
A5
A7
A6
B5
A1
A2
B8
VCCA
19
20
18
17
16
14
13
11
4
9
10
5
6
8
7
15
1
3
12
2
U10
VCC1V5_FPGA
LCD_E_LS
LCD_RW_LS
LCD_DB4_LS
LCD_DB5_LS
LCD_DB6_LS
LCD_DB7_LS
LCD_RS_LS
NC
LCD_RS
LCD_DB7
LCD_DB6
LCD_DB5
LCD_DB4
LCD_RW
LCD_E
NC
TXS0108E 8-Bit
Bidirectional
Voltage Level
Translator
J31
GND
VCC5V0
R92
6.81kΩ
R133
2 kΩ
NC
NC
VCC5V0
C24
0.1μF 25V
X5R
GND
VCC5V0
C23
0.1μF 25V
X5R
GND
GND
X-Ref Target - Fig ure 1-22
Figure 1-22: LCD Header Details
UG810_c1_22_031214
LCD Display Assembly
KC705 PWA
10 mm
Low Profile Socket
Samtec SLW-107-01-L-D
Low Profile Terminal
Samtec MTLW-107-07-G-D-265
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Xilinx KC705 Specifications

General IconGeneral
BrandXilinx
ModelKC705
CategoryMotherboard
LanguageEnglish

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