January 2007 239
Intel
®
855GME Chipset and Intel
®
6300ESB ICH Embedded Platform Design Guide
Intel
®
6300ESB Design Guidelines
Note: V
BIAS
is also very sensitive to environmental conditions.
9.11.7 SUSCLK
SUSCLK is a square waveform signal output from the RTC oscillation circuit. Depending on the
quality of the oscillation signal on RTCX1 (largest voltage swing), the SUSCLK duty cycle may be
between 30-70%. When the SUSCLK duty cycle is beyond 30-70% range, it indicates a poor
oscillation signal on RTCX1 and RTCX2.
SUSCLK may be probed directly using normal probe (50
Ω input impedance probe). It is an
appropriated signal you may use to check the RTC frequency to determine the accuracy of the
6300ESB’s RTC Clock (see Application Note AP-728 for further details).
9.11.8 RTC-Well Input Strap Requirements
All RTC-well inputs (RSMRST#, RTCRST#, INTRUDER#) must be either pulled up to V
CC
RTC
or pulled down to ground while in G3 state. RTCRST# when configured as shown in Figure 131
meets this requirement. RSMRST# should have a weak external pull-down to ground and
INTRUDER# should have a weak external pull-up to V
CC
RTC. This prevents these nodes from
floating in G3, and correspondingly prevents I
CC
RTC leakage that may cause excessive coin-cell
drain. The PWROK input signal should also be configured with an external weak pull-down.
9.12 Serial I/O
The 6300ESB supports two Serial I/O ports. For proper functionality of the Serial I/O ports ensure
the clock input (UART_CLK) has the correct value.
System designers have two options for the input clock:
• 48 MHz -Recommended
• 14.745 MHz
Warning: If using the 14.745 MHz option, ensure it is 14.745 MHz. Any deviation from this value, such as
using a common system clock (14.318 MHz), will cause improper functioning of the Serial I/O.
Note: A 48 MHz clock input is the recommended value to ease system design. A CK409 has an 48 MHz
clock available so no other clock source for the Serial I/O would be necessary.
9.12.1 Serial I/O Interface Not Utilized
When the Serial I/O is not utilized in the system, all associated pins may be left as No Connect.
Note: SIU_DTR# is a strap pin. To utilize the strap feature (TOP Swap) a pull-down to ground is
necessary. Refer to the
6300ESB Datasheet for more details.
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