January 2007 267
Intel
®
855GME Chipset and Intel
®
6300ESB ICH Embedded Platform Design Guide
Schematic Checklist Summary
TEST[3:1]
1K
Ω pull-down to
GND
(default: no stuff)
For each signal, stuffing option
for pull-down shall be provided
for testing purposes. For normal
operation, leave the resistors
unpopulated.
THERMTRIP#
56
Ω pull-up to
VCCP
56
Ω from
pull-up to the
6300ESB pin
Point-to-point connection to an
6300ESB (THRMTRIP# signal),
with pull-up and series resistors
placed by 6300ESB.
THERMTRIP# is a VCCP signal.
When connecting to device other
than an 6300ESB, voltage
translation logic may be
required.
VCC[72:1]
Connect to
CPU_CORE
From Intel
®
IMVP-IV
specification power supply.
VCCA[3:0] Connect to V1P8
The Low Voltage Intel
®
Pentium
®
M Processor on 90 nm
process with 2 MB L2 cache will
support a Vcca of 1.8V or 1.5V.
VCC1_05
[25:1]
Connect to VCCP
VCCSENSE,
VSSSENSE
54.9
Ω ±1%
pull-down to GND
(Default: no stuff)
For each signal, stuffing option
for pull-down shall be provided
for testing purposes. Also, a test
point for differential probe
ground shall be placed between
the two resistors. For normal
operation, leave the resistors
unpopulated.
GND[192:1] Connect to GND
Figure 148. Routing Illustration for INIT# (for Intel
®
Pentium
®
M/Celeron
®
M Processor)
Table 115. Connection Recommendations (Sheet 3 of 3)
Pin Name
System
Pull-up/Pull-down
Series
Termination
Voltage
Translation
Notes √
B3161-01
FWH
V_IO_FWH
R2
R1
Rs
3904
L4
L1L2
L3
3.3V
3.3V
Q2
Q1
3904
CPU
Intel
®
6300ESB
I/O
Controller
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