January 2007 265
Intel
®
855GME Chipset and Intel
®
6300ESB ICH Embedded Platform Design Guide
Schematic Checklist Summary
Schematic Checklist Summary 12
The following checklist provides design recommendations and guidance for Intel
®
Pentium
®
M/
Celeron
®
M processor systems with the Intel
®
855GME chipset.
The schematic checklist is a tool used to ensure that design recommendations detailed in this
Platform Design Guide have been followed prior to schematic reviews. The items contained in this
checklist attempt to address important connections and critical supporting circuitry; however, it is
not a complete list. For complete design recommendations, refer to the main content of this
document (referred to as the Platform Design Guide) and the appended Customer Reference Board
(CRB) schematics. The information in this guide is subject to change.
Note: Unless otherwise specified the default tolerance on resistors is ± 5 percent.
12.1 Intel
®
Pentium
®
M/Celeron
®
M Processor Checklist
12.1.1 Connection Recommendations
Table 115 presents the connection recommendations. Figure 148 depicts the routing illustration for
INIT# (for Intel Pentium M/Celeron M processor). Figure 149 depicts the voltage translation
circuit for
PROCHOT# (for Intel Pentium M/Celeron M processor).
Table 115. Connection Recommendations (Sheet 1 of 3)
Pin Name
System
Pull-up/Pull-down
Series
Termination
Voltage
Translation
Notes
√
A20M#
Point-to-point connection to the
6300ESB, (A20M# signal).
BR0#
Point-to-point connection to
GMCH (BREQ0# signal).
COMP0,
COMP2
27.4
Ω ± 1%
pull-down to GND
Resistor placed within 0.5” of
processor pin. Trace shall be
27.4
Ω ±15%.
COMP1,
COMP3
54.9
Ω ± 1%
pull-down to GND
Resistor placed within 0.5” of
processor pin. Trace shall be
55
Ω ±15%.
DPSLP#
4.7 K
Ω pull-up to
VCCP at CPU
1K
Ω pull-up to
VCCP at GMCH
Used only with the ICH4-M. The
6300ESB does not provide this
signal.
FERR#
56
Ω pull-up to
VCCP
56
Ω from
pull-up to
6300ESB pin
Point-to-point connection to
6300ESB (FERR# signal), with
pull-up resistor and series
resistor placed by the 6300ESB.
GTLREF
1 K
Ω ± 1%
pull-up to VCCP
2 K
Ω ± 1%
pull-down to GND
Voltage divider shall be placed
within 0.5” of processor pin.