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Intel 855GME User Manual

Intel 855GME
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January 2007 31
Intel
®
855GME Chipset and Intel
®
6300ESB ICH Embedded Platform Design Guide
System Overview
2.3.6.4 Packaging/Power
732-pin Micro-FCBGA (37.5 mm x 37.5 mm)
VTTLF, VTTHF (1.05 V)
VCC, VCCASM, VCCHL, VCCAHPLL, VCCAGPLL, VCCADPLLA, VCCADPLLB
(1.2 V or 1.35 V; as needed to support 250MHz graphics core frequency and DDR333)
VCCADAC, VCCDVO, VCCDLVDS, VCCALVDS, (1.5 V)
VCCSM, VCCQSM, VCCTXLVDS (2.5 V)
VCCGPIO (3.3 V)
Power Management (855GME)
Optimized Clock Gating for 3D and Display Engines
On-die thermal sensor
2.3.7 Intel
®
6300ESB System Features
The Intel
®
6300ESB I/O Controller Hub system consists of:
The I/O Controller Hub (Intel
®
6300ESB I/O Controller Hub) which provides the I/O
subsystem with access to the rest of the system. Additionally, it integrates many I/O functions.
The Intel
®
6300ESB I/O Controller Hub integrates:
Upstream Hub Interface for access to the MCH
Two port Serial ATA controller
Two channel Ultra ATA/100 Bus Master IDE controller
One EHCI USB 2.0 host controller and two UHCI USB 1.1 host controllers (expanded
capabilities for four ports)
I/O APIC
SMBus 2.0 controller
FWH interface
LPC interface
AC’97 2.2 interface
PCI-X 1.0 interface at 66MHz
PCI 2.2 interface
Two Serial I/O ports
Two-Stage Watchdog timer
2.3.8 Firmware Hub (FWH)
An integrated hardware Random Number Generator (RNG) on Intel parts
Register-based locking

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Intel 855GME Specifications

General IconGeneral
BrandIntel
Model855GME
CategoryComputer Hardware
LanguageEnglish

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