Intel 855GME User Manual

January 2007 249
Intel
®
855GME Chipset and Intel
®
6300ESB ICH Embedded Platform Design Guide
Platform Clock Routing Guidelines
Platform Clock Routing Guidelines 11
11.1 System Clock Groups
The system clocks are considered as a subsystem in themselves. At the center of this subsystem is
the clock synthesizer/driver component. Several vendors offer suitable products, as defined in the
Intel CK409 Synthesizer/Driver Specification. This device provides the set of clocks required to
implement a platform-level motherboard solution. Table 104 presents a breakdown of the various
individual clocks.
Note: When used in Intel
®
855GME chipset platforms, the CK409 is configured in the unbuffered mode
and a host clock swing of 710 mV.
Table 104. Individual Clock Breakdown
Clock Group Frequency Driver/Pin Receiver/s Comments
HOST_CLK 100 MHz
CK409
CPU[2:0]
CPU
GMCH
Debug Port
Length matched
Differential signaling
CLK66 66 MHz
CK409
3V66[5:0]
GMCH
Intel
®
82801DB
I/O Controller Hub
4 (ICH4)
Length matched
CLK33 33 MHz
CK409
PCIF[2:0]
PCI[6:0]
ICH4
SIO
FWH
Length matched to CLK66
Synchronous but not edge aligned with
CLK66
Phase delay of 1.5 ns to 3.5 ns
PCICLK
(Expansion)
33 MHz
CK409
PCI[6:0]
PCIF[2:0]
PCI Conn #1
PCI Conn #2
PCI Conn #3
Length matched to CLK33
CLK33 length minus 2.5 inches
CLK14 14 MHz
CK409
REF0
ICH4
SIO
Independent clock
DOTCLK 48 MHz
CK409
48 MHz
GMCH Independent clock
SSCCLK 48/66 MHz
CK409
VCH
GMCH Independent clock
USBCLK 48 MHz
CK409
48 MHz
ICH4 Independent clock

Intel 855GME Specifications

General

Brand	Intel
Model	855GME
Category	Computer Hardware
Language	English