Renesas RL78 Series User Manual

RL78/F13, F14 CHAPTER 15 SERIAL ARRAY UNIT
R01UH0368EJ0210 Rev.2.10 978
Dec 10, 2015
Table 15-4. Selection of Operation Clock For UART
SMRmn
Register
SPSm Register Operation Clock (fMCK)
Note
CKSmn PRS
m13
PRS
m12
PRS
m11
PRS
m10
PRS
m03
PRS
m02
PRS
m01
PRS
m00
fCLK = 32 MHz
0 X X X X 0 0 0 0 fCLK 32 MHz
X X X X 0 0 0 1 fCLK/2 16 MHz
X X X X 0 0 1 0 fCLK/2
2
8 MHz
X X X X 0 0 1 1 fCLK/2
3
4 MHz
X X X X 0 1 0 0 fCLK/2
4
2 MHz
X X X X 0 1 0 1 fCLK/2
5
1 MHz
X X X X 0 1 1 0 fCLK/2
6
500 kHz
X X X X 0 1 1 1 fCLK/2
7
250 kHz
X X X X 1 0 0 0 fCLK/2
8
125 kHz
X X X X 1 0 0 1 fCLK/2
9
62.5 kHz
X X X X 1 0 1 0 fCLK/2
10
31.25 kHz
X X X X 1 0 1 1 fCLK/2
11
15.63 kHz
1 0 0 0 0 X X X X fCLK 32 MHz
0 0 0 1 X X X X fCLK/2 16 MHz
0 0 1 0 X X X X fCLK/2
2
8 MHz
0 0 1 1 X X X X fCLK/2
3
4 MHz
0 1 0 0 X X X X fCLK/2
4
2 MHz
0 1 0 1 X X X X fCLK/2
5
1 MHz
0 1 1 0 X X X X fCLK/2
6
500 kHz
0 1 1 1 X X X X fCLK/2
7
250 kHz
1 0 0 0 X X X X fCLK/2
8
125 kHz
1 0 0 1 X X X X fCLK/2
9
62.5 kHz
1 0 1 0 X X X X fCLK/2
10
31.25 kHz
1 0 1 1 X X X X fCLK/2
11
15.63 kHz
Other than above Setting prohibited
Note When changing the clock selected for fCLK (by changing the system clock control register (CKC) value), do so
after having stopped (serial channel stop register m (STm) = 0003H) the operation of the serial array unit
(SAU).
Remarks 1. X: Don’t care
2. m: Unit number (m = 0, 1), n: Channel number (n = 0, 1), mn = 00, 01, 10, 11

Renesas RL78 Series Specifications

General

Brand	Renesas
Model	RL78 Series
Category	Computer Hardware
Language	English