RL78/F13, F14 CHAPTER 27 SAFETY FUNCTIONS
R01UH0368EJ0210 Rev.2.10 1582
Dec 10, 2015
27.3 Operation of Safety Functions
27.3.1 Flash memory CRC operation function (high-speed CRC)
The IEC60730 standard mandates the checking of data in the flash memory, and recommends using CRC to do it. The
high-speed CRC provided in the RL78/F13 and RL78/F14 can be used to check the entire code flash memory area during
the initialization routine. The high-speed CRC can be executed only when the program is allocated on the RAM and in the
HALT mode of the main system clock.
High-speed CRC operations are performed by stopping the CPU and reading 32 bits of data from the flash memory in
one clock cycle. The feature of this operation is the short time it takes until the end of the check (for example, 64 Kbytes of
flash memory are checked in 512 s when the operating clock is at 32 MHz).
The CRC generator polynomial used complies with “X
16
+ X
12
+ X
5
+ 1” of CRC-16-CCITT.
The high-speed CRC operates in MSB first order from bit 31 to bit 0.
Caution The result of the CRC operation will differ from that in on-chip debugging because of allocation of the
monitor program.
Remark The operation result is different between the high-speed CRC and the general CRC, because the general CRC
operates in LSB first order.
<Control register>
(1) Flash memory CRC control register (CRC0CTL)
This register is used to control the operation of the high-speed CRC ALU, as well as to specify the operation range.
The CRC0CTL register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
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