Intel Pentium 4 User Manual

I/O Controller Hub 2
R
Intel
®
Pentium
®
4 Processor / Intel
®
850 Chipset Family Platform Design Guide 165
Table 38. Length Requirements for Single Solution Interconnect
Component Minimum (inches) Maximum (inches) Notes
82562EH L=4.5 L=10 Signal Lines LAN_RXD[2:1] and
LAN_TXD[2:1] not connected
82562ET L=3.5 L=10
CNR L=3 L=9
NOTE: Length of trace from connector to LOM should be 0.5 to 3 inches.
9.9.1.3 LOM/CNR Interconnect
The following guidelines allow for an all inclusive motherboard solution. This layout combines
LOM, dual footprint, and the CNR solutions. The resistor pack ensures that either a CNR option or
a LAN on motherboard option can be implemented at one time. The recommended trace routing
lengths are shown in Figure 119. LOM/CNR Interconnect.
Figure 119. LOM/CNR Interconnect
LAN_LOM-CNR_intercomm
ICH2
Res.
pack
CNR PLC card
B
A
PLC
C D
Table 39. Length Requirements for LOM/CNR Interconnect
Configuration Segment A
(inches)
Segment B
(inches)
Segment C
(inches)
Segment D
(inches)
82562EH 0.5 to 6.0 4 to 10 - A — —
82562ET 0.5 to 7 3 to 10 - A — —
Dual Footprint 0.5 to 6 4 to 10 – A — —
82562ET/EH
Card
1
0.5 to 6.5 — 2.5 to 9 – A 0.5 to 3
NOTES:
1
Total trace length should not exceed 13 inches.

Intel Pentium 4 Specifications

General

Architecture	x86
Core Count	1
Microarchitecture	NetBurst
Manufacturer	Intel
Core Names	Willamette, Northwood, Prescott, Cedar Mill
Virtualization Technology	No
Release Date	November 20, 2000
Clock Speed	1.3 GHz to 3.8 GHz
FSB Speed	400 MHz to 1066 MHz
Socket	Socket 423, Socket 478, LGA 775
Introduced	2000
Product Line	Pentium
Front Side Bus	400 MHz to 1066 MHz
Hyper-Threading	Yes (Prescott and later)
64-bit Support	Yes (Prescott and later)
Instruction Set	MMX, SSE, SSE2, SSE3
Discontinued	2008
Process Technology	180 nm, 130 nm, 90 nm, 65 nm
L2 Cache	256 KB, 512 KB, 1 MB, 2 MB
Lithography	180 nm, 130 nm, 90 nm, 65 nm
L1 Cache	8 KB