R8C/20 Group, R8C/21 Group 14. Timers
Rev.2.00 Aug 27, 2008 Page 251 of 458
REJ09B0250-0200
14.3.12 Notes on Timer RD
14.3.12.1 TRDSTR Register
• Set the TRDSTR register using the MOV instruction.
• When the CSELi (i = 0 or 1) is set to 0 (the count stops at compare match of registers TRDi and
TRDGRAi), the count does not stop and the TSTARTi bit remains unchanged even if 0 (count stops) is
written to the TSTARTi bit.
Therefore, set the TSTARTi bit to 0 to change other bits without changing the TSTARTi bit when the
CSELi bit is set to 0.
To stop counting by a program, set the TSTARTi bit to 0 after setting the CSELi bit to 1. Although the
CSELi bit is set to 1 and the TSTARTi bit is set to 0 at the same time (with 1 instruction), the count cannot
be stopped.
• Table 14.36 lists the TRDIOji (j = A, B, C, or D) Pin Output Level when Count Stops to use the TRDIOji
pin with the timer RD output.
14.3.12.2 TRDi Register (i = 0 or 1)
• When writing the value to the TRDi register by a program while the TSTARTi bit in the TRDSTR register
is set to 1 (count starts), avoid to overlap with the timing to set the TRDi register to 0000h, and then write.
When the timing to set the TRDi register to 0000h overlaps with the timing to write the value to the TRDi
register, the value is not written and the TRDi register is set to 0000h.
These precautions are applicable when selecting the following by the CCLR2 to CCLR0 bits in the
TRDCRi register.
- 001b (clear by the TRDi register at the compare match with the TRDGRAi register)
- 010b (clear by the TRDi register at the compare match with the TRDGRBi register.)
- 011b (synchronous clear)
- 101b (clear by the TRDi register at the compare match with the TRDGRCi register.)
- 110b (clear by the TRDi register at the compare match with the TRDGRDi register.)
• When writing the value to the TRDi register and continuously reading the same register, the value before
writing may be read. In this case, execute the JMP.B instruction between the writing and reading.
Program Example MOV.W #XXXXh, TRD0 ;Writing
JMP.B L1 ;JMP.B
L1: MOV.W TRD0,DATA ;Reading
14.3.12.3 TRDSRi Register (i = 0 or 1)
When writing the value to the TRDSRi register and continuously reading the same register, the value before
writing may be read. In this case, execute the JMP.B instruction between the writing and reading.
Program Example MOV.B #XXh, TRDSR0 ;Writing
JMP.B L1 ;JMP.B
L1: MOV.B TRDSR0,DATA ;Reading
Table 14.36 TRDIOji (j = A, B, C, or D) Pin Output Level when Count Stops
Count Stop TRDIOji Pin Output when Count Stops
When the CSELi bit is set to 1, set the TSTARTi bit to 0 and the count
stops.
Hold the output level immediately before the
count stops.
When the CSELi bit is set to 0, the count stops at compare match of
registers TRDi and TRDGRAi.
Hold the output level after output changes by
compare match.
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