R8C/20 Group, R8C/21 Group 21. Usage Notes
Rev.2.00 Aug 27, 2008 Page 447 of 458
REJ09B0250-0200
21.7 Notes on A/D Converter
• Write to each bit (other than bit 6) in the ADCON0 register, each bit in the ADCON1 register, or the SMP bit
in the ADCON2 register when the A/D conversion stops (before a trigger occurs).
When the VCUT bit in the ADCON1 register is changed from 0 (VREF not connected) to 1 (VREF
connected), wait for at least 1 µs or longer before the A/D conversion starts.
• When changing A/D operating mode, select an analog input pin again.
• When using in one-shot mode. Ensure that the A/D conversion is completed and read the AD register. The IR
bit in the ADIC register or the ADST bit in the ADCON0 register can determine whether the A/D conversion
is completed.
• When using the repeat mode, select the frequency of the A/D converter operating clock φAD or more for the
CPU clock during A/D conversion.
Do not select the fOCO-F for the φAD.
• If setting the ADST bit in the ADCON0 register to 0 (A/D conversion stops) by a program and the A/D
conversion is forcibly terminated during the A/D conversion operation, the conversion result of the A/D
converter will be indeterminate. If the ADST bit is set to 0 by a program, do not use the value of AD register.
• Connect 0.1 µF capacitor between the P4_2/VREF pin and AVSS pin.
• Do not enter stop mode during A/D conversion.
• Do not enter wait mode when the CM02 bit in the CM0 register is set to 1 (peripheral function clock stops in
wait mode) during A/D conversion.
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