R8C/20 Group, R8C/21 Group 10. Clock Generation Circuit
Rev.2.00 Aug 27, 2008 Page 74 of 458
REJ09B0250-0200
10.4 Power Control
There are three power control modes. All modes other than wait and stop modes are referred to as standard
operating mode.
10.4.1 Standard Operating Mode
Standard operating mode is further separated into three modes.
In standard operating mode, the CPU clock and the peripheral function clock are supplied to operate the CPU
and the peripheral function clocks. Power consumption control is enabled by controlling the CPU clock
frequency. The higher the CPU clock frequency, the more processing power increases. The lower the CPU
clock frequency, the more power consumption decreases. When unnecessary oscillator circuits stop, power
consumption is further reduced.
Before the clock sources for the CPU clock can be switched over, the new clock source after switching needs to
be stabilized and oscillated. If the new clock source is the XIN clock, allow sufficient wait time in a program
until an oscillation is stabilized before exiting.
−: can be 0 or 1, no change in outcome.
10.4.1.1 High-Speed Clock Mode
The XIN clock divided-by-1 (no division), -2, -4, -8, or -16 provides the CPU clock. Set the CM06 bit to 1
(divide-by-8 mode) when transiting to high-speed on-chip oscillator mode, low-speed on-chip oscillator mode.
If the CM14 bit is set to 0 (low-speed on-chip oscillator on) or the FRA00 bit in the FRA0 register is set to 1
(high-speed on-chip oscillator on), the fOCO can be used for timers RA.
When the FRA00 bit is set to 1, fOCO40M can be used for timer RD.
When the CM14 bit is set to 0 (low-speed on-chip oscillator on), fOCO-S can be used for the watchdog timer
and voltage detection circuit.
10.4.1.2 High-Speed On-Chip Oscillator Mode
The high-speed on-chip oscillator is used as the on-chip oscillator clock when the FRA00 bit in the FRA0
register is set to 1 (high-speed on-chip oscillator on) and the FRA01 bit in the FRA0 register is set to 1. The on-
chip oscillator divided-by-1 (no division), -2, -4, -8 or -16 provides the CPU clock. Set the CM06 bit to 1
(divide-by-8) when transiting to high-speed clock mode.
If the FRA00 bit is set to 1, fOCO40M can be used for timer RD.
When the CM14 bit is set to 0 (low-speed on-chip oscillator on), fOCO-S can be used for the watchdog timer
and voltage detection circuit.
Table 10.2 Settings and Modes of Clock Associated Bits
Modes
OCD Register CM1 Register CM0 Register FRA0 Register
OCD2 CM17, CM16 CM14 CM13 CM06 CM05 FRA01 FRA00
High-speed
clock mode
No division 0 00b
− 100−−
Divide-by-2 0 01b − 100−−
Divide-by-4 0 10b − 100−−
Divide-by-8 0 −−110−−
Divide-by-16 0 11b − 100−−
High-speed
on-chip
oscillator
mode
No division 1 00b −−0 − 11
Divide-by-2 1 01b
−−0 − 11
Divide-by-4 1 10b
−−0 − 11
Divide-by-8 1
−−−1 − 11
Divide-by-16 1 11b
−−0 − 11
Low-speed
on-chip
oscillator
mode
No division 1 00b 0
− 0 − 0 −
Divide-by-2 1 01b 0 − 0 − 0 −
Divide-by-4 1 10b 0 − 0 − 0 −
Divide-by-8 1 − 0 − 1 − 0 −
Divide-by-16 1 11b 0 − 0 − 0 −
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