R8C/20 Group, R8C/21 Group 21. Usage Notes
Rev.2.00 Aug 27, 2008 Page 443 of 458
REJ09B0250-0200
21.3.4 Notes on Timer RE
21.3.4.1 Starting and Stopping Count
Timer RE has the TSTART bit for instructing count start or stop, and the TCSTF bit which indicates count start
or stop. The TSTART and TCSTF bits are in the TRECR1 register.
Timer RE starts counting when setting the TSTART bit to 1 (count starts) and the TCSTF bit is set to 1 (count
starts). It takes the time for up to 2 cycles of the count source until the TCSTF bit is set to 1 after setting the
TSTART bit to 1. During this time, do not access registers associated with Timer RE
(1)
other than the TCSTF
bit.
Also, timer RE stops counting when setting the TSTART bit to 0 (count stops) and the TCSTF bit is set to 0
(count stops). It takes the time for up to 2 cycles of the count source until the TCSTF bit is set to 0 after setting
the TSTART bit to 0. During this time, do not access registers associated with timer RE other than the TCSTF
bit.
NOTE:
1. Registers associated with Timer RE:TRESEC, TREMIN, TRECR1, TRECR2, TRECSR
21.3.4.2 Register Setting
Write to the following registers or bits while timer RE stops.
• TRESEC and TRECR2 registers
• The INT bit in TRECR1 register
• RCS0 to RCS2 bits in TRECSR register
The state while Timer RE stops is indicated as the state where the TSTART and TCSTF bits in the TRECR1
register are set to 0 (timer RE stops).
Also, set all above-mentioned registers and bits (immediately before timer RE count starts) before setting the
TRECR2 register.