A - 1
Table of Contents
SFR Page Reference ........................................................................................................................... B - 1
1. Overview ......................................................................................................................................... 1
1.1 Applications ............................................................................................................................................... 1
1.2 Performance Overview .............................................................................................................................. 2
1.3 Block Diagram .......................................................................................................................................... 4
1.4 Product Information .................................................................................................................................. 5
1.5 Pin Assignments ........................................................................................................................................ 7
1.6 Pin Functions ............................................................................................................................................. 8
2. Central Processing Unit (CPU) ..................................................................................................... 10
2.1 Data Registers (R0, R1, R2 and R3) ....................................................................................................... 11
2.2 Address Registers (A0 and A1) ............................................................................................................... 11
2.3 Frame Base Register (FB) ....................................................................................................................... 11
2.4 Interrupt Table Register (INTB) .............................................................................................................. 11
2.5 Program Counter (PC) ............................................................................................................................. 11
2.6 User Stack Pointer (USP) and Interrupt Stack Pointer (ISP) .................................................................. 11
2.7 Static Base Register (SB) ........................................................................................................................ 11
2.8 Flag Register (FLG) ................................................................................................................................ 11
2.8.1 Carry Flag (C) ..................................................................................................................................... 11
2.8.2 Debug Flag (D) ................................................................................................................................... 11
2.8.3 Zero Flag (Z) ....................................................................................................................................... 11
2.8.4 Sign Flag (S) ....................................................................................................................................... 11
2.8.5 Register Bank Select Flag (B) ............................................................................................................ 11
2.8.6 Overflow Flag (O) .............................................................................................................................. 11
2.8.7 Interrupt Enable Flag (I) ..................................................................................................................... 12
2.8.8 Stack Pointer Select Flag (U) .............................................................................................................. 12
2.8.9 Processor Interrupt Priority Level (IPL) ............................................................................................. 12
2.8.10 Reserved Bit ........................................................................................................................................ 12
3. Memory ......................................................................................................................................... 13
3.1 R8C/20 Group ......................................................................................................................................... 13
3.2 R8C/21 Group ......................................................................................................................................... 14
4. Special Function Registers (SFRs) ............................................................................................... 15
5. Resets ........................................................................................................................................... 21
5.1 Hardware Reset ....................................................................................................................................... 24
5.1.1 When Power Supply is Stable ............................................................................................................. 24
5.1.2 Power On ............................................................................................................................................ 24
5.2 Power-On Reset Function ....................................................................................................................... 26
5.3 Voltage Monitor 1 Reset ......................................................................................................................... 27
5.4 Voltage Monitor 2 Reset ......................................................................................................................... 27
5.5 Watchdog Timer Reset ............................................................................................................................ 27
5.6 Software Reset ......................................................................................................................................... 27
6. Voltage Detection Circuit .............................................................................................................. 28
6.1 VCC Input Voltage .................................................................................................................................. 34
6.1.1 Monitoring Vdet1 ............................................................................................................................... 34