R8C/20 Group, R8C/21 Group 16. Clock Synchronous Serial Interface
Rev.2.00 Aug 27, 2008 Page 344 of 458
REJ09B0250-0200
16.3.8 Notes on I
2
C Bus Interface
Set the IICSEL bit in the PMR register to 1 (select I
2
C bus interface function) to use I
2
C bus interface.
16.3.8.1 Multimaster Operation
The following actions must be performed to use the I
2
C bus interface in multimaster operation.
• Transfer rate
Set the transfer rate by 1/1.8 or faster than the fastest rate of the other masters. For example, if the fastest
transfer rate of the other masters is set to 400 kbps, the I
2
C-bus transfer rate in this MCU should be set to
223 kbps (= 400/1.18) or more.
• Bits MST and TRS in the ICCR1 register setting
(a) Use the MOV instruction to set bits MST and TRS.
(b) When arbitration is lost, confirm the contents of bits MST and TRS. If the contents are other than the
MST bit set to 0 and the TRS bit set to 0 (slave receive mode), set the MST bit to 0 and the TRS bit to 0
again.
16.3.8.2 Master Receive Mode
Either of the following actions must be performed to use the I
2
C bus interface in master receive mode.
(a) In master receive mode while the RDRF bit in the ICSR register is set to 1, read the ICDRR register
before the rising edge of the 8th clock.
(b) In master receive mode, set the RCVD bit in the ICCR1 register to 1 (disables the next receive
operation) to perform 1-byte communications.
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