RL78/G13 CHAPTER 6 TIMER ARRAY UNIT
R01UH0146EJ0100 Rev.1.00 371
Sep 22, 2011
6.6.2 TOmn Pin Output Setting
The following figure shows the procedure and status transition of the TOmn output pin from initial setting to timer
operation start.
Figure 6-29. Status Transition from Timer Output Setting to Operation Start
TCRmn
Timer alternate-function pin
Timer output signal
TOEmn
TOmn
(Counter)
Undefined value (FFFFH after reset)
Write operation enabled period to TOmn
<1> Set TOMmn
Set TOLmn
<4> Set the port to
output mode
<2> Set TOmn <3> Set TOEmn <5> Timer operation start
Write operation disabled period to TOmn
Hi-Z
<1> The operation mode of timer output is set.
• TOMmn bit (0: Master channel output mode, 1: Slave channel output mode)
• TOLmn bit (0: Positive logic output, 1: Negative logic output)
<2> The timer output signal is set to the initial status by setting timer output register m (TOm).
<3> The timer output operation is enabled by writing 1 to the TOEmn bit (writing to the TOm register is disabled).
<4> The port I/O setting is set to output (see 6.3 (15) Port mode registers 0, 1, 3, 4, 6, 10, 14 (PM0, PM1, PM3,
PM4, PM6, PM10, PM14)).
<5> The timer operation is enabled (TSmn = 1).
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0 to 7)
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