RL78/G13 CHAPTER 18 STANDBY FUNCTION
R01UH0146EJ0100 Rev.1.00 862
Sep 22, 2011
18.2.2 STOP mode
(1) STOP mode setting and operating statuses
The STOP mode is set by executing the STOP instruction, and it can be set only when the CPU clock before the
setting was the high-speed on-chip oscillator clock, X1 clock, or external main system clock.
Cautions 1. Because the interrupt request signal is used to clear the standby mode, if there is an interrupt
source with the interrupt request flag set and the interrupt mask flag reset, the standby mode is
immediately cleared if set. Thus, the STOP mode is reset to the HALT mode immediately after
execution of the STOP instruction and the system returns to the operating mode as soon as the
wait time set using the oscillation stabilization time select register (OSTS) has elapsed.
2. When using CSIp, UARTq, or the A/D converter in the SNOOZE mode, set up serial standby
control register m (SSCm) and A/D converter mode register 2 (ADM2) before switching to the
STOP mode. For details, see 12.3 Registers Controlling Serial Array Unit and 11.3 Registers
Used in A/D Converter.
Remark 20 to 64-pin products: p = 00; q = 0; m = 0
80, 100, 128-pin products: p = 00, 20; q = 0, 2; m = 0, 1
The operating statuses in the STOP mode are shown below.
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