Fujitsu 8FX User Manual

MB95630H Series
MN702-00009-2v0-E FUJITSU SEMICONDUCTOR LIMITED 457
CHAPTER 22 UART/SIO
22.2 Configuration
22.2 Configuration
The UART/SIO consists of the following blocks:
• UART/SIO serial mode control register 1 ch. n (SMC1n)
• UART/SIO serial mode control register 2 ch. n (SMC2n)
• UART/SIO serial status and data register ch. n (SSRn)
• UART/SIO serial input data register ch. n (RDRn)
• UART/SIO serial output data register ch. n (TDRn)
The number of pins and that of channels of the UART/SIO vary among products. For details,
refer to the device data sheet.
In this chapter, "n" in a pin name and a register abbreviation represents the channel number.
For details of pin names, register names and register abbreviations of a product, refer to the
device data sheet.
■ Block Diagram of UART/SIO
Figure 22.2-1 Block Diagram of UART/SIO
Dedicated baud rate generator
1/4
Pin
Pin
Pin
Clock
selector
External clock input
UCKn
Serial data input
UIn
Start
bit
detection
Recep-
tion bit
count
Parity
operation
Shift
register
for
reception
Shift
register
for trans-
mission
Tr ansmis-
sion bit
count
Parity
operation
Serial data output
UOn
Serial clock output
Port control
Set to
each block
Internal bus
Reception
state
decision
circuit
PER
OVE
FER
RDRF
Transmis-
sion state
decision
circuit
TDRE
RIE
TEIE
Reception
interrupt
Transmission
interrupt
State from
each block
State from
each block
TCPL
TCIE
Data sample clock input
UART/SIO
serial status
and data
register ch. n
UART/SIO
serial input data
register ch. n
UART/SIO
serial output
data register
ch. n
UART/SIO
serial mode
control
registers 1, 2
ch. n

Fujitsu 8FX Specifications

General

Brand	Fujitsu
Model	8FX
Category	Computer Hardware
Language	English