MB95630H Series
MN702-00009-2v0-E FUJITSU SEMICONDUCTOR LIMITED 559
CHAPTER 26 DUAL OPERATION FLASH MEMORY
26.6 Operations
26.6 Operations
Pay attention in particular to the following points when using dual operation
Flash memory:
• Interrupt generated when upper banks are updated
• Procedure of setting the sector swap enable bit in the flash memory status
register (FSR:SSEN)
â– Interrupt Generated When Upper Banks Are Updated
The dual operation Flash memory consists of two banks. Like conventional Flash products,
however, it cannot be erased/programmed and read at the same time in banks on the same side.
As SA2 contains an interrupt vector, an interrupt vector from the CPU cannot be read normally
when an interrupt occurs during programming data to an upper bank. Before an upper bank can
be updated, set the sector swap enable bit (FSR:SSEN) to "1". When an interrupt occurs,
therefore, SA1 is accessed to read interrupt vector data. Copy the same data to SA1 and SA2
before setting the FSR:SSEN bit.
â– Procedure for Setting Sector Swap Enable Bit (FSR:SSEN)
Figure 26.6-1 shows a sample procedure of setting the sector swap enable bit (FSR:SSEN).
To modify data in the upper bank, set FSR:SSEN to "1". While data is being written to the
Flash memory, modifying the setting of FSR:SSEN is prohibited. The setting of FSR:SSEN
can only be modified before the start of programming data to the Flash memory or after the
completion of programming data to the Flash memory. In addition, control the Flash memory
interrupts while setting FSR:SSEN as follows: before setting FSR:SSEN, disable the Flash
memory interrupts; after setting FSR:SSEN, enable the interrupts.
Figure 26.6-1 Sample Procedure for Setting the Sector Swap Enable Bit (FSR:SSEN)
Start updating Flash data
Start program operation
Copy data
from SA2 to SA1
Start program operation
Complete
Flash data update
Complete
Flash data update
Set FSR:SSEN to "1"
Set FSR:SSEN to "0"
Update data in upper bankUpdate data in lower bank
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