MB95630H Series
MN702-00009-2v0-E FUJITSU SEMICONDUCTOR LIMITED 541
CHAPTER 26 DUAL OPERATION FLASH MEMORY
26.4 Checking Automatic Algorithm
Execution Status
26.4 Checking Automatic Algorithm Execution Status
Since the Flash memory uses the automatic algorithm to execute the program/
erase flow, its internal operating status can be checked through the hardware
sequence flags.
■ Hardware Sequence Flags
● Overview of hardware sequence flags
The hardware sequence flag consists of the following 5-bit output:
• Data polling flag (DQ7)
• Toggle bit flag (DQ6)
• Execution timeout flag (DQ5)
• Sector erase timer flag (DQ3)
• Toggle bit2 flag (DQ2)
The hardware sequence flags can tell whether a program command, a chip erase command or a
sector erase command has been terminated, whether an erase code can be written and whether
an erase sector or a non-erase sector is being read.
The value of a hardware sequence flag can be checked by a read access to the address of a
target sector in the Flash memory after a command sequence is set. Note that a hardware
sequence flag is output only to the bank from which a command has been issued.
Table 26.4-1 shows the bit allocation of the hardware sequence flags.
• To decide whether a program command, a chip erase command or a sector erase command
is being executed or has been terminated, check the respective hardware sequence flags or
the flash memory program/erase status bit in the flash memory status register (FSR:RDY).
After programming/erasing is terminated, the Flash memory returns to the read/reset state.
• When creating a program/erase program, read data after confirming the termination of
programming/erasing using the DQ2, DQ3, DQ5, DQ6 and DQ7 flags.
• The hardware sequence flags can also be used to check whether the second sector erase
code write and those to be executed afterward are valid or not.
Table 26.4-1 Bit Allocation of Hardware Sequence Flag
Bit no. 76543210
Hardware sequence flag DQ7 DQ6
DQ5
- DQ3 DQ2 - -
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