R01UH0384EJ0311 Rev. 3.11 1
Dec 22, 2016
R01UH0384EJ0311
Rev. 3.11
Dec 22, 2016
RL78/G10
RENESAS MCU
CHAPTER 1 OUTLINE
1.1 Features
Ultra-low power consumption technology
• V
DD = single power supply voltage of 2.0 to 5.5 V
(Use this product within the voltage range from 2.25 to 5.5 V because the detection voltage (VSPOR) of the
selectable power-on-reset (SPOR) circuit should also be considered.)
• HALT mode
• STOP mode
RL78 CPU core
• CISC architecture with 3-sage pipeline
• Minimum instruction execution time: Can be changed from high speed (0.05 μs: @ 20 MHz operation with high-
speed on-chip oscillator) to low speed (1.0 μs: @ 1 MHz operation)
• Address space: 1 MB
• General-purpose registers: 8-bit register × 8
• On-chip RAM: 128 to 512 B
Code flash memory
• Code flash memory: 1 to 4 KB
• On-chip debug function
High-speed on-chip oscillator
• Select from 20 MHz, 10 MHz, 5 MHz, 2.5 MHz, and 1.25 MHz
• High accuracy: ±2.0 % (V
DD = 2.0 to 5.5 V, TA = -20 to +85°C)
Operating ambient temperature
• T
A = -40 to +85°C
Power management and reset function
• On-chip selectable power-on-reset (SPOR) circuit
Serial interface
• CSI: 1/2
Note
channels
• UART: 1 channel
• Simplified I
2
C communication: 1 channel
• I
2
C communication: 1 channel
Note
Timer
• 8-/16-bit timer: 2/4
Note
channels
• 12-bit interval timer
Note
: 1 channel
• Watchdog timer: 1 channel (operable with the dedicated low-speed on-chip oscillator)
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