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Renesas RL78/G10 User Manual

Renesas RL78/G10
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RL78/G10 CHAPTER 4 PORT FUNCTIONS
R01UH0384EJ0311 Rev. 3.11 69
Dec 22, 2016
4.5.2 Register settings for alternate functions that do not use an output function
If the output from an alternate function associated with a pin is not used, the settings described below must be specified.
If the pin is subject to a peripheral I/O redirect function, the output can be changed to another pin by setting the peripheral
I/O redirection register (PIOR). In this manner, the port function or another alternate function that is assigned to the target
pin can be used.
(1) SOp = 1/TxDq = 1 (when not using the serial output (SOp/TxDq) of SAU)
In situations where serial output (SOp/TxDq) is not used, such as when SAU is used exclusively for serial input, set
the bits in the serial output enable register 0 (SOE0) associated with the output that is not used to 0 (output disabled),
and the SO0n bit in the serial output register 0 (SO0) to 1 (High). This is the same as the default settings.
(2) SCKp = 1/SDAr = 1/SCLr = 1 (when not using the channel n of SAU)
When not using SAU, set the bit n (SE0n) in the serial channel enable status register 0 (SE0) to 0 (operation halted
status), set the bits in the serial output enable register 0 (SOE0) associated with the output that is not used to 0 (output
disabled), and the SO0n and CKO0n bits in the serial output register 0 (SO0) to 1 (High). This is the same as the default
settings.
(3) TO0n = 0 (when not using the output from the channel n of TAU)
When not using the TO0n output from TAU, set the bits in the timer output enable register 0 (TOE0) associated with
the output that is not used to 0 (output disabled), and the bits in the timer output register 0 (TO0) to 0 (Low). This is the
same as the default settings.
(4) SDAA0 = 0/SCLA0 = 0 (when not using IICA)
When not using IICA, set the IICE0 bit in the IICA control register 00 (IICCTL00) to 0 (operation halted). This is the
same as the default settings.
(5) PCLBUZ0 = 0 (when not using the clock output/buzzer output)
When not using the clock output/buzzer output, set the PCLOE0 bit in the clock output selection register 0 (CKS0) to
0 (output disabled). This is the same as the default settings.
4.5.3 Example of register settings for port and alternate functions used
Table 4-5 shows examples of register settings for port and alternate functions that are used. Registers that control the
port functions should be set as indicated in Table 4-5. For conventions used in Table 4-5, see the remarks provided
below:
Remark −: Excluded
×: don't care
PIOR: Peripheral I/O redirection register
POM0: Port output mode register 0
PMC0: Port mode control register 0
PMn: Port mode register n (n = 0, 4)
Pm: Port output latch (m = 0, 4, 12, 13)
Functions in parentheses in the above table can be assigned via settings in the peripheral I/O redirection
register (PIOR).

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Renesas RL78/G10 Specifications

General IconGeneral
BrandRenesas
ModelRL78/G10
CategoryMotherboard
LanguageEnglish

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