RL78/G10 CHAPTER 10 A/D CONVERTER
R01UH0384EJ0311 Rev. 3.11 262
Dec 22, 2016
10.9 Cautions for A/D Converter
10.9.1 Operating current in STOP mode
Shift to STOP mode after stopping the A/D converter (by setting bit 7 (ADCS) of A/D converter mode register 0 (ADM0)
to 0). The operating current can be reduced by setting bit 0 (ADCE) of the ADM0 register to 0 at the same time.
10.9.2 Input range of ANI0 to ANI6 pins
Observe the rated range of the ANI0 to ANI6
Note
pins input voltage. If a voltage exceeding VDD or equal to or lower
than VSS (even in the range of absolute maximum ratings) is input to an analog input channel, the converted value of that
channel becomes undefined. In addition, the converted values of the other channels may also be affected.
10.9.3 Conflicting operations
<1> Reading from the ADCRH or ADCRL register has priority if conflict between writing to the A/D conversion result
register (ADCRH, ADCRL) and reading from ADCRH or ADCRL register by software operation occurs at the
end of conversion. After the read operation, the new conversion result is written to the ADCRH or ADCRH
register.
<2> Writing to the ADM0 register has priority if conflict between writing to the ADCRH or ADCRL register and writing
to the A/D converter mode register 0 (ADM0) occurs at the end of conversion. Writing to the ADCRH or ADCRL
register is not performed, nor is the A/D conversion end interrupt signal (INTAD) generated.
10.9.4 Noise countermeasures
To maintain the 10-bit resolution, attention must be paid to noise input to the V
DD and ANI0 to ANI6
Note
pins.
<1> Connect a capacitor with a low equivalent resistance and a good frequency response to the power supply.
<2> The higher the output impedance of the analog input source, the greater the influence. To reduce the noise,
connecting external C as shown in Figure 10-23 is recommended.
<3> Do not switch these pins with other pins during conversion.
<4> The accuracy is improved if the HALT mode is set immediately after the start of conversion.
Note For 10-pin products, ANI0 to ANI3.
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