RL78/G10 CHAPTER 10 A/D CONVERTER
R01UH0384EJ0311 Rev. 3.11 264
Dec 22, 2016
10.9.7 Interrupt request flag (ADIF)
The interrupt request flag (ADIF) is not cleared even if the analog input channel specification register (ADS) is changed.
When A/D conversion is stopped and then resumed, clear ADIF flag before the A/D conversion operation is resumed.
10.9.8 Conversion results just after A/D conversion start
The first A/D conversion value immediately after A/D conversion starts may not fall within the rating range if the ADCS
bit is set to 1 within 0.1
μ
s after the ADCE bit was set to 1. Take measures such as polling the A/D conversion end
interrupt request signal (INTAD) and removing the first conversion result.
10.9.9 A/D conversion result register (ADCRH, ADCRL) read operation
When a write operation is performed to A/D converter mode register 0 (ADM0), analog input channel specification
register (ADS), and port mode control register (PMC0), the contents of the ADCRH and ADCRL registers may become
undefined. Read the conversion result following conversion completion before writing to the ADM0, ADS, or PMC0 register.
10.9.10 Internal equivalent circuit
The equivalent circuit of the analog input block is shown below.
Figure 10-24. Internal Equivalent Circuit of ANIn Pin
ANIn
C1 C2
R1
Table 10-4. Resistance and Capacitance Values of Equivalent Circuit
AVREFP, VDD ANIn Pins R1 [kΩ] C1 [pF] C2 [pF]
2.7 V ≤ VDD ≤ 5.5 V ANI0 to ANI6
Note
40 8 1.7
2.4 V ≤ VDD < 2.7 V ANI0 to ANI6
Note
200
Note For 10-pin products, ANI0 to ANI3.
Remark The resistance and capacitance values shown in Table 10-4 are not guaranteed values.
10.9.11 Starting the A/D converter
The range of operating voltage for the A/D converter is from 2.4 to 5.5 V. Start the A/D converter after the V
DD voltage
stabilizes.
To Next Page
Loading...
Need help?
General
