RL78/G10 CHAPTER 8 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER
R01UH0384EJ0311 Rev. 3.11 233
Dec 22, 2016
8.3.2 Registers controlling port functions of clock output/buzzer output pin
Using the port pin for the clock output/buzzer output controller requires setting of the registers that control the port
function multiplexed on the clock output/buzzer output pin (PCLBUZ0 pin): (port mode registers 0, 4 (PM0, PM4), port
registers 0, 4 (P0, P4), port mode control register 0 (PMC0), peripheral I/O redirection register (PIOR)).
For details on the registers that control the port functions, see 4.3.1 Port mode registers 0, 4 (PM0, PM4), 4.3.2 Port
registers 0, 4, 12, 13 (P0, P4, P12, P13), 4.3.5 Port mode control register 0 (PMC0), and 4.3.6 Peripheral I/O
redirection register (PIOR).
When you intend to use the PCLBUZ0 pin, set the corresponding bits in the port mode register (PM0) and port mode
control register 0 (PMC0) to 0 and the corresponding bits in the port register (P0) and port output mode register (POM0) to
1.
For details, see 4.5.3 Example of register settings for port and alternate functions used.
PCLBUZ0 pin output can be assigned to pin P40 by setting the PIOR bit in the peripheral I/O redirection register (PIOR)
to 1.