RL78/G10 CHAPTER 14 INTERRUPT FUNCTIONS
R01UH0384EJ0311 Rev. 3.11 511
Dec 22, 2016
Figure 14-11. Interrupt Request Acknowledgment Timing (Minimum Time)
11 clocks
Instruction Instruction Instruction
Instruction
CPU processing
xxIF
8 clocks
PSW and PC saved,
jump to interrupt
servicing
Interrupt servicing
program
Remark 1 clock: 1/f
CLK (fCLK: CPU clock)
Figure 14-12. Interrupt Request Acknowledgment Timing (Maximum Time)
18 clocks
Instruction Instruction Instruction
Previous interrupt
instruction
CPU processing
xxIF
8 clocks8 clocks
PSW and PC saved,
jump to interrupt
servicing
Interrupt servicing
program
Remark 1 clock: 1/fCLK (fCLK: CPU clock)
14.4.2 Software interrupt request acknowledgment
A software interrupt request is acknowledged by BRK instruction execution. Software interrupts cannot be disabled.
If a software interrupt request is acknowledged, the contents are saved into the stacks in the order of the program
status word (PSW), then program counter (PC), the IE flag is reset (0), and the contents of the vector table (0007EH,
0007FH) are loaded into the PC and branched.
Restoring from a software interrupt is possible by using the RETB instruction.
Caution Can not use the RETI instruction for restoring from the software interrupt.
14.4.3 Multiple interrupt servicing
Multiple interrupt servicing occurs when another interrupt request is acknowledged during execution of an interrupt.
Multiple interrupt servicing does not occur unless the interrupt request acknowledgment enabled state is selected (IE =
1). When an interrupt request is acknowledged, interrupt request acknowledgment becomes disabled (IE = 0). Therefore,
to enable multiple interrupt servicing, it is necessary to set (1) the IE flag with the EI instruction during interrupt servicing to
enable interrupt acknowledgment.
Moreover, even if interrupts are enabled, multiple interrupt servicing may not be enabled, this being subject to interrupt
priority control. Two types of priority control are available: default priority control and programmable priority control.
Programmable priority control is used for multiple interrupt servicing.
In the interrupt enabled state, if an interrupt request with a priority equal to or higher than that of the interrupt currently
being serviced is generated, it is acknowledged for multiple interrupt servicing. If an interrupt with a priority lower than that
of the interrupt currently being serviced is generated during interrupt servicing, it is not acknowledged for multiple interrupt
servicing. Interrupt requests that are not enabled because interrupts are in the interrupt disabled state or because they
have a lower priority are held pending. When servicing of the current interrupt ends, the pending interrupt request is
acknowledged following execution of at least one main processing instruction execution.
Table 14-6 shows relationship between interrupt requests enabled for multiple interrupt servicing and Figure 14-13
shows multiple interrupt servicing examples.
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