RL78/G10 CHAPTER 3 CPU ARCHITECTURE
R01UH0384EJ0311 Rev. 3.11 29
Dec 22, 2016
3.1.2 Mirror area
The products with 1/2/4 KB flash memory mirror the code flash area of 00000H to 003FFH/007FFH/00FFFH to the area
of F8000H to F83FFH/F87FFH/F8FFFH (the code flash area to be mirrored is set by the processor mode control register
(PMC)).
By reading data from F8000H to F83FFH/F87FFH/F8FFFH, an instruction that does not have the ES register as an
operand can be used, and thus the contents of the code flash can be read with the shorter code.
See 3.1 Memory Space for the mirror area of each product.
The mirror area can only be read and no instruction can be fetched from this area.
The following shows examples.
Example R5F10Y16 (Flash memory: 2 KB)
Mirror
FFFFFH
FFF00H
FFEFFH
FFEF8H
FFEF7H
00000H
007FFH
FFDE0H
FFDDFH
Code flash memory
2KB
Reserved
Reserved
Reserved
Reserved
RAM
256 bytes
Mirror
2KB
256 bytes
General-purpose register
8 bytes
FFEE0H
FFEDFH
F0000H
EFFFFH
F0800H
F07FFH
F8000H
F7FFFH
F8800H
F87FFH
Special function register (SFR)
For example, 00789H is mirrored
to F8789H.
Data can therefore be read by
MOV A, !8789H
instead of
MOV ES, #00H
MOV A, ES:!789H.
Special function register (2nd SFR)
2
KB
<R>
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