EasyManuals Logo
Home>Renesas>Motherboard>RL78/G10

Renesas RL78/G10 User Manual

Renesas RL78/G10
637 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #45 background imageLoading...
Page #45 background image
RL78/G10 CHAPTER 3 CPU ARCHITECTURE
R01UH0384EJ0311 Rev. 3.11 28
Dec 22, 2016
(2) CALLT instruction table area
The 64-byte area of 00080H to 000BFH can store the subroutine entry address of a 2-byte call instruction (CALLT).
Set the subroutine entry address to a value in a range of 00000H to 0FFFFH (because an address code is 2 bytes).
(3) Option byte area
The 4-byte area of 000C0H to 000C3H can be used as an option byte area. For details, see CHAPTER 19 OPTION
BYTE.
(4) On-chip debug security ID setting area
The 10-byte areas of 000C4H to 000CDH and 010C4H to 010CDH can be used as an on-chip debug security ID
setting area. For details, see CHAPTER 21 ON-CHIP DEBUG FUNCTION.

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Renesas RL78/G10 and is the answer not in the manual?

Renesas RL78/G10 Specifications

General IconGeneral
BrandRenesas
ModelRL78/G10
CategoryMotherboard
LanguageEnglish

Related product manuals