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Renesas RL78/G10 - Page 459

Renesas RL78/G10
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RL78/G10 CHAPTER 13 SERIAL INTERFACE IICA
R01UH0384EJ0311 Rev. 3.11 442
Dec 22, 2016
Figure 13-22. Flow When Setting WUP0 = 0 upon Address Match (Including Extension Code Reception)
Waits for five cycles of f
CLK
Executes processing corresponding to the operation to be executed
after checking the operation state of serial interface IICA.
STOP mode state
No
Yes
WUP0 = 0
Wait
Reading IICS0
INTIICA0 = 1?
Use the following flows to perform the processing to release the STOP mode other than by an interrupt request
(INTIICA0) generated from serial interface IICA.
Master device operation: Flow shown in Figure 13-23
Slave device operation:
Cases where the trigger for recovery from the STOP mode is the INTIICA0 interrupt:
Same as the flow in Figure 13-22
Cases where the trigger for recovery from the STOP mode is other than the INTIICA0 interrupt:
Continues the operation with WUP0 = 1 until the INTIICA0 interrupt is generated.

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