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Renesas RL78/G10 User Manual

Renesas RL78/G10
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RL78/G10 CHAPTER 13 SERIAL INTERFACE IICA
R01UH0384EJ0311 Rev. 3.11 447
Dec 22, 2016
(2) When communication reservation function is disabled (bit 0 (IICRSV) of IICA flag register 0 (IICF0) = 1)
When bit 1 (STT0) of IICA control register 00 (IICCTL00) is set to 1 when the bus is not used in a communication
during bus communication, this request is rejected and a start condition is not generated. The following two
statuses are included in the status where bus is not used.
• When arbitration results in neither master nor slave operation
• When an extension code is received and slave operation is disabled (ACK is not returned and the bus was
released by setting bit 6 (LREL0) of the IICCTL00 register to 1 and saving communication)
To confirm whether the start condition was generated or request was rejected, check STCF (bit 7 of the IICF0
register). It takes up to 5 clocks until the STCF bit is set to 1 after setting STT0 = 1. Therefore, secure the time by
software.

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Renesas RL78/G10 Specifications

General IconGeneral
BrandRenesas
ModelRL78/G10
CategoryMotherboard
LanguageEnglish

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