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R8C/20 Group, R8C/21 Group 5. Resets

Rev.2.00 Aug 27, 2008 Page 22 of 458

REJ09B0250-0200

Table 5.2 lists the Pin Functions after Reset, Figure 5.2 shows CPU Register Status after Reset, Figure 5.3 shows

Reset Sequence, and Figure 5.4 shows the OFS Register.

Figure 5.2 CPU Register Status after Reset

Table 5.2 Pin Functions after Reset

Pin Name Pin Functions

P0, P1, P2 Input port

P3_0, P3_1, P3_3

to P3_5, P3_7 Input port

P4_2 to P4_7 Input port

P6 Input port

b19

Interrupt table register (INTB)

Program counter (PC)

User stack pointer (USP)

Interrupt stack pointer (ISP)

Static base register (SB)

Content of addresses 0FFFEh to 0FFFCh

Flag register (FLG)

IPL

DZSBOIU

b15

0000h

Data register (R0)

Data register (R1)

Data register (R2)

Data register (R3)

Address register (A0)

Address register (A1)

Frame base register (FB)

00000h

0000h

Default Chapter8
- Table of Contents8
- Overview17
1 Overview18
- Performance Overview18
- Block Diagram20
- Product Information21
- Pin Assignments23
- Pin Functions24
2 Central Processing Unit (CPU)26
- Data Registers (R0, R1, R2 and R3)27
  - Interrupt Enable Flag (I)28
3 Memory29
- R8C/21 Group30
4 Special Function Registers (Sfrs)31
5 Resets37
- Hardware Reset40
- Power-On Reset Function42
- Voltage Monitor 1 Reset43
6 Voltage Detection Circuit44
- VCC Input Voltage50
- Voltage Monitor 1 Reset51
- Voltage Monitor 2 Interrupt and Voltage Monitor 2 Reset52
7 Programmable I/O Ports54
- Effect on Peripheral Functions55
- Port Settings66
- Unassigned Pin Handling77
8 Processor Mode78
10 Clock Generation Circuit80
- XIN Clock87
- On-Chip Oscillator Clocks88
- CPU Clock and Peripheral Function Clock89
- Power Control90
- Notes on Clock Generation Circuit101
11 Protection102
- Interrupts103
- Software Interrupts104
- Special Interrupts105
- Interrupts and Interrupt Vector106
- Interrupt Control108
- INT Interrupt117
  - Inti Input Filter (I = 0 to 3)119
- Key Input Interrupt120
- Address Match Interrupt122
13 Watchdog Timer129
- Count Source Protection Mode Disabled132
- Count Source Protection Mode Enabled133
14 Timers134
- Timer RA136
- Timer RB153
- Timer RD175
- Count Source180
- Timer RD Interrupt265
  - Notes on Timer RD267
- Timer RE273
  - Output Compare Mode274
  - Notes on Timer RE280
15 Serial Interface281
- Clock Synchronous Serial I/O Mode287
  - Polarity Select Function290
  - Continuous Receive Mode291
- Clock Asynchronous Serial I/O (UART) Mode292
  - Bit Rate296
- Notes on Serial Interface297
- Clock Synchronous Serial Interface298
16 Clock Synchronous Serial Interface299
- Clock Synchronous Serial I/O with Chip Select (SSU)299
  - Transfer Clock308
  - SS Shift Register (SSTRSR)310
- Interrupt Requests311
17 Hardware LIN361
- Input/Output Pins362
- Register Configuration363
- Functional Description365
- Notes on Hardware LIN375
18 A/D Converter376
- One-Shot Mode380
- Repeat Mode383
- Sample and Hold386
- A/D Conversion Cycles387
- Internal Equivalent Circuit of Analog Input388
- Output Impedance of Sensor under A/D Conversion389
- Notes on A/D Converter390
19 Flash Memory391
- Memory Map393
- Functions to Prevent Rewriting of Flash Memory396
- Standard Serial I/O Mode416
- Parallel I/O Mode420
- Notes on Flash Memory421
20 Electrical Characteristics424
21 Usage Notes444
- Notes on Interrupts445
  - Changing Interrupt Sources446
  - Changing Interrupt Control Register Contents447
- Notes on Timers448
  - Notes on Timer RB449
- Notes on A/D Converter463
- Notes on Flash Memory464
- Notes on Noise467
22 Notes on On-Chip Debugger468
23 Notes on Emulator Debugger469
Appendix 1. Package Dimensions470
Appendix 2. Connection Examples between Serial Writer and On-Chip Debugging Emulator471
Appendix 3. Example of Oscillation Evaluation Circuit472
- Index473

Brand	Renesas
Model	R8C/20
Category	Control Unit
Language	English

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