2. Port 2 Data Register (P2DR)—H'FF83
P2DR is an 8-bit register containing the data for pins P24 to P20.
Bits 7 to 5 are reserved. They cannot be modified and are always read as “1.”
When the CPU reads P2DR, for output pins it reads the value in the P2DR latch, but for input
pins, it obtains the pin status directly.
9.3.3 Pin Functions in Each Mode
Port 2 has different functions in the expanded modes (modes 1, 2, 3, 4) and the single-chip mode
(mode 7). Separate descriptions are given below.
Pin Functions in Expanded Modes: In the expanded modes (modes 1, 2, 3, and 4), all pins of
P2DDR is automatically set to “1” for output. Port 2 outputs the bus control signals (AS, R/W,
DS, RD, WR).
Figure 9-3 shows the pin functions in the expanded modes.
Bit 76543210
———P2
4 P23 P22 P21 P20
Initial value 11100000
Read/Write — — — R/W R/W R/W R/W R/W
WR (output)
Port RD (output)
2 DS (output)
R/W (output)
AS (output)
Figure 9-3 Port 2 Pin Functions in Expanded Modes
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