Hitachi H8/500 Series User Manual

1.2 Block Diagram
Figure 1-1 shows a block diagram of the H8/532 chip.
CPU
P4 /A
77
P4 /A66
P4 /A55
P4 /A44
P4 /A33
P4 /A22
P4 /A11
P4 /A00
P5 /A157
P5 /A146
P5 /A135
P5 /A124
P5 /A113
P5 /A102
P5 /A91
P5 /A80
P6 /A193
P6 /A182
P6 /A171
P6 /A160
P7 /FTOA17
P7 /FTI22
P7 /FTI11
P7 /TMCI0
P7 /FTOB /FTCI 363 P7 /FTOB /FTCI252
P7 /FTOB /FTCI14
P7 /FTI /TMRI33
1
P8 /AN77 P8 /AN66 P8 /AN55 P8 /AN44 P8 /AN33 P8 /AN22 P8 /AN11 P8 /AN00
8 Bits Timer
16 Bits Free
Running Timer
(x 3 channel)
Watchdog
Timer
Serial
Communication
Interface
PWM Timer
(x 3 channel)
10 Bits
A/D Converter
Port 9 Port 8 Port 7
Port 6 Port 5 Port 4
Port 3Port 2Port 1
Clock
Gener-
ator
EXTAL
XTAL
Wait-
State
Controller
RAM
1 kByte
PROM/Mask
ROM 32 kByte
Interrupt
Controller
Data
Transfer
Controller
Vcc
Vcc
Vss
Vss
Vss
Vss
Vss
Vss
*
AV
cc
AVss
NMI
RES
STBY
MD
0
MD1
MD2
P9 /SCK7 P9 /RXD6 P9 /TXD5
P9 /PW34 P9 /PW23 P9 /PW12
P9 /FTOA31 P9 /FTOA20
* CP-84 and CG-84 only
P3 /D77 P3 /D66 P3 /D55 P3 /D44 P3 /D33 P3 /D22 P3 /D11 P3 /D00 P1 /TMO7 P1 /IRQ16 P1 /IRQ05 P1 /WAIT4 P1 /BREQ3 P1 /BACK2 P1 /E1 P1 /ø0 P2 /WR4 P2 /RD3 P2 /DS2 P2 /R/W1 P2 /AS0
Data bus (Low) Data bus (High) Address bus
4
Figure 1-1 Block Diagram
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Hitachi H8/500 Series Specifications

General

Brand	Hitachi
Model	H8/500 Series
Category	Computer Hardware
Language	English