A: Before Execution of BSET Instruction
MOV.B #80, R0 ;write data (H'80) for data register
MOV.B R0, @RAM0 ;write to work area (RAM0)
MOV.B R0, @PORT5 ;write to P5DR
P5
7
P5
6
P5
5
P5
4
P5
3
P5
2
P5
1
P5
0
Input/output Input Input Output Output Output Output Output Output
Pin state Low High Low Low Low Low Low Low
DDR 0 0 1 1 1 1 1 1
DR 10000000
Pull-up On Off Off Off Off Off Off Off
RAM0 1 0 0 0 0 0 0 0
B: Execution of BSET Instruction
BSET.B #0, @RAM0 ;set bit 0 in work area (RAM0)
C: After Execution of BSET Instruction
MOV.B @RAM0, R0 ;get value in work area (RAM0)
MOV.B R0, @PORT5 ;write value to P5DR
P5
7
P5
6
P5
5
P5
4
P5
3
P5
2
P5
1
P5
0
Input/output Input Input Output Output Output Output Output Output
Pin state Low High Low Low Low Low Low High
DDR 0 0 1 1 1 1 1 1
DR 10000001
Pull-up On Off Off Off Off Off Off Off
RAM0 1 0 0 0 0 0 0 0
9.7 Port 6
9.7.1 Overview
Port 6 is a 4-bit input/output port with the pin configuration shown in figure 9-15. In mode 4 (the
expanded maximum mode that uses the on-chip ROM), the pins of port 6 function either as
general-purpose input pins or as the page address bus, depending on the port 6 data direction
register (P6DDR).
Port 6 has built-in MOS pull-ups that can be turned on or off under program control.
Outputs from port 6 can drive one TTL load and a 90pF capacitive load. They can also drive a
Darlington transistor pair.
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