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Hitachi H8/500 Series User Manual

Hitachi H8/500 Series
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11.5 Sample Application
In the example below, the 8-bit timer is used to generate a pulse output with a selected duty factor.
The control bits are set as follows:
1. In the TCR, CCLR1 is cleared to “0” and CCLR0 is set to “1” so that the timer counter is
cleared when its value matches the constant in TCORA.
2. In the TCSR, bits OS3 to OS0 are set to “0110,” causing the output to change to “1” on
compare-match A and to “0” on compare-match B.
With these settings, the 8-bit timer provides output of pulses at a rate determined by TCORA with
a pulse width determined by TCORB. No software intervention is required.
Clear counter
TCNT
H’FF
TCORA
TCORB
H’00
TMO pin
Figure 11-8 Example of Pulse Output
219
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Hitachi H8/500 Series Specifications

General IconGeneral
BrandHitachi
ModelH8/500 Series
CategoryComputer Hardware
LanguageEnglish

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