4-Port OC-3c/STM-1 POS SPA Architecture
The following figure identifies some of the hardware devices that are part of the POS SPA architecture. The
figure shows the four ports that are supported by the 4-Port OC-3c/STM-1 POS SPA only.
Figure 6: 4-Port OC-3c/STM-1 POS SPA Architecture
Every incoming and outgoing packet on the 4-Port OC-3c/STM-1 POS SPA goes through the SONET/SDH
framer and field-programmable gate array (FPGA) devices.
Path of a Packet in the Ingress Direction
The following steps describe the path of an ingress packet through the 4-Port OC-3c/STM-1 POS SPA:
1
The framer receives SONET/SDH streams from the SFP optics, extracts clocking and data, and processes
the section, line, and path overhead.
2
The framer extracts the POS frame payload and verifies the frame size and frame check sequence (FCS).
3
The framer passes valid frames to the field-programmable gate array (FPGA) on the SPA.
4
The FPGA on the SPA transfers frames to the host through the SPI4.2 bus for further processing and
switching.
Path of a Packet in the Egress Direction
The following steps describe the path of an egress packet through the 4-Port OC-3c/STM-1 POS SPA:
1
The host sends packets to the FPGA on the SPA using the SPI4.2 bus.
2
The FPGA on the SPA stores the data in the appropriate channel first-in first-out (FIFO) queue.
3
The FPGA on the SPA passes the packet to the framer.
4
The framer accepts the data and stores it in the appropriate channel queue.
5
The framer adds the FCS and SONET/SDH overhead.
The framer sends the data to the SFP optics for transmission onto the network.
Cisco ASR 1000 Series Aggregation Services Routers SIP and SPA Software Configuration Guide, Cisco IOS XE
Everest 16.5
OL-14127-17 189
Overview of the POS SPAs
4-Port OC-3c/STM-1 POS SPA Architecture
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